Computing the sparse matrix vector product using block-based kernels without zero padding on processors with AVX-512 instructions

Area of Science:

• High Performance Computing (HPC)
• Numerical Analysis
• Computer Architecture

Background:

• Sparse matrix-vector product (SpMV) is crucial for scientific computing.
• Existing block-based SpMV kernels require zero padding, hindering practical application.
• Optimizing SpMV on modern CPUs remains an active research area.

Purpose of the Study:

• To develop efficient SpMV kernels utilizing AVX-512 instructions.
• To enable block-based SpMV without zero padding in matrix storage.
• To provide a method for selecting the optimal kernel based on matrix properties.

Main Methods:

• Implementation of mask-based sparse matrix formats and SpMV kernels in assembly language.
• Development of a prediction method for optimal blocking size using interpolation.
• Performance comparison against Intel MKL CSR and CSR5 using benchmark matrices.

Main Results:

• Achieved significant performance improvements for SpMV operations.
• Demonstrated effectiveness in both sequential and parallel execution scenarios.
• Validated the proposed approach on standard benchmark datasets.

Conclusions:

• The new AVX-512 kernels offer a practical solution for high-performance SpMV without zero padding.
• The predictive method aids in selecting the most efficient kernel for diverse matrices.
• The open-source library SPC5 facilitates the adoption of these optimized SpMV kernels.